The Philips Journal of Research, Vol 41, No. 3, 1986, pages 219-231 contains an article entitled "Some Features of Signal Demodulation Resulting from the Practical Implementation of a Direct Conversion Radio Receiver" by R A Brown, R J Dewey and C J Collier. The article states that a zero IF radio receiver architecture is suitable for VLSI integration and as a digitally implemented radio. Further it states that the direct conversion receiver has many advantages over the superheterodyne architecture and has been a great success for SSB reception. The article considers the extension of the direct conversion architecture to the reception of AM and FM signals. It shows that the ac coupling required to block unwanted dc components at the mixer outputs can degrade the subsequent demodulation of both AM and FM but that this can be successfully overcome by adjustment of the receiver local oscillator frequency.
In spite of this remark, the problem of dc offsets in direct conversion receivers still prevails. Sources of dc offsets are present in all stages of a receiver due to imbalances and tolerances in the integrated components and when the dc offsets are amplified, later stages in the receiver architecture are driven into saturation. A further source of dc offsets is the unavoidable reception of the local oscillator signal. This unavoidable reception of the local oscillator signal occurs by way of several simultaneous paths such as (i) direct leakage from the local oscillator part of the mixer to the signal input port, (ii) radiation from the local oscillator circuits to the antenna, and (iii) conducted local oscillator signals from the mixers via the RF amplifier to the antenna and back into the mixer. As these paths include the antenna, they are subject to variations during normal use of the pager resulting in a time variable dc output at the outputs of the mixers.
Using dc blocks to prevent dc offsets gives the familiar "hole-in-the-middle" response due to their high pass filter response and also means that the receiver will have a long settling time when subjected to large amplitude steps. DC blocks also apply a limitation to the receiver offset performance.